Soft Error Tolerant Count Min Sketches

Soft-Error Tolerant Cache Architectures

The problem of soft errors caused by radiation events are expected to get worse with technology scaling. This thesis focuses on mitigation of soft errors to improve the reliability of memory caches. We survey existing mitigation techniques and discuss their issues. We then propose 1) a technique that can mitigate soft errors in caches with lower costs than the widely-used Error Correcting Code ...

Design of Soft Error Tolerant Logic Circuits

We present two novel circuit design techniques that effectively reduce the impact of radiation-induced single event transients (SET) on logic circuits. Both techniques can be applied to large CMOS designs and have been verified by a recently developed soft error rate analysis (SERA) methodology [3]. Rapid scaling of integrated circuit process technology has resulted in significant improvements ...

A Soft-error-tolerant Asynchronous Microcontroller

A method is proposed for making asynchronous (QDI) circuits entirely tolerant to soft errors caused by radiation or other noise effects. The method has three components: (1) a special kind of duplication for random logic, (2) special circuitry for arbiter and synchronizer (as needed for example for external interrupts), and (3) error correction for memory arrays. An entire microcontroller has b...

Count-Min Sketches for Estimating Password Frequency within Hamming Distance Two

The count-min sketch is a useful data structure for recording and estimating the frequency of string occurrences, such as passwords, in sub-linear space with high accuracy. However, it cannot be used to draw conclusions on groups of strings that are similar, for example close in Hamming distance. This paper introduces a variant of the count-min sketch which allows for estimating counts within a...

Title : Count - Min Sketch